Errors and Warnings

There are 0 error(s), 4 warning(s), and 0 information.

[Warning]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'acsi_cf.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'data_in<6>' based upon the LOC constraint 'P43'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'data_in<7>' based upon the LOC constraint 'P44'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'i1_A1' based upon the LOC constraint 'P1'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.
[Warning]:Cpld:1239 - The global clock designation (BUFG) on signal 'i1_A1_IBUF' is ignored. Most likely the signal is gated and therefore cannot be used as a global control signal.
[Warning]:Cpld:1239 - The global clock designation (BUFG) on signal 'data_in_7_IBUF' is ignored. Most likely the signal is gated and therefore cannot be used as a global control signal.
[Warning]:Cpld:1239 - The global clock designation (BUFG) on signal 'data_in_6_IBUF' is ignored. Most likely the signal is gated and therefore cannot be used as a global control signal.